The AD808 provides the receiver functions of data quantization, signal level detect, clock recovery and data retiming for 622Mbps NRZ data. The device, together with PIN diode/preamplifier combination, can be used for highly integrated, low cost, low power SONET OC-12 or SDH STM-4
fiber optic receiver.
The receiver front end signal level detect circuit indicates when input signal level has fallen below user adjustable threshold. The threshold is set with single external resistor. The signal level detect circuit 3 dB optical hysteresis prevents chatter at the signal level detect output.
The PLL has a factory trimmed VCO center frequency and frequency acquisition control loop that combine to guarantee frequency acquisition without false lock. This eliminates reliance on external components such as crystal or SAW filter, to aid frequency acquisition.
- 2.5 degrees RMS output jitter
- 4 mV quantizer sensitivity
- +5 or –5.2V single supply operation
- 400mW low power
- 10 KH ECL/PECL compatible output
- 16-Lead narrow 150 mil SOIC package
- 622 Mbps clock recovery and data retiming
- Accepts NRZ data, no preamble required
- 10mV to 40mV, programmable level detect range
- Phase-locked loop type clock recovery, no crystal required
- Meets CCITT G.958 requirements for STM-4 Regenerator, type A
- Meets Bellcore TR-NWT-000253 requirements for OC-12
